Telecommunication and Information Technology > Lab Report > DeVry University, New Jersey ECET 105 WEEK 3 LAB full report (All)

DeVry University, New Jersey ECET 105 WEEK 3 LAB full report

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Objectives: 1. To understand basic logic functions (AND, OR, and NOT) and their complement used in Boolean algebra and digital logic design. 2. To test simple logic small-scale integration (SSI) in ... tegrated circuit (IC) devices. Results: With the circuit built the result matched the theoretical version of the chip and the gates. In further results I was able to control the 0,1 outputs with the switches provided on the circuit. Conclusions: In conclusion, I was able to confirm the theoretical outputs with my board and confirm the output when the switches are put in certain positions. Team: Waldo Corea EET Waldo Corea Name Program Signature Name Program Signature Name Program Signature III. A. OR Gate Data Sheet Truth Table, Boolean Expression, and Measured Truth Table: Input (Pin 1) Input (Pin 2) Output (Pin 3) 0 0 0 0 1 1 1 0 1 1 1 1 2-Input OR Gate Theoretical Truth Table OUTPUT Y = A+B Input (Pin 1) Input (Pin 2) Output (Pin 3) 0 0 0 0 1 1 1 0 1 1 1 1 2-Input OR Gate Measured Truth Table III. B. AND Gate Data Sheet Truth Table, Boolean Expression, and Measured Truth Table: Input (Pin 1) Input (Pin 2) Output (Pin 3) 0 0 0 0 1 0 1 0 0 1 1 1 2-Input AND Gate Theoretical Truth Table OUTPUT Y = AB [Show More]

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